Neural Network Hardware Accelerator
About this Project
Designed a custom hardware accelerator for neural network inference, optimizing for low power consumption and high throughput. Implemented advanced parallel processing architectures and memory optimization techniques.
Silicon for AI
A custom hardware design that runs neural network inference directly, without a general-purpose CPU in the way.
Built for the edge
Optimized for low power draw so it can live in small devices, not just server racks.
Parallel by design
Multiply-accumulate units work in parallel to push throughput far beyond software loops.
Verified in HDL
Designed and simulated in VHDL and Verilog with full testbench coverage.
Hardware has no patch button. Every design decision, from bit widths to memory access patterns, had to be simulated and verified up front, because a mistake in silicon logic cannot be fixed later.
The accelerator hit its performance targets in simulation and grounded my AI software work in a real understanding of what the hardware underneath is doing.